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Silicon Labs /Series0 /EFM32G /EFM32G842F128 /PCNT1 /CTRL

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Interpret as CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLE)MODE 0 (CNTDIR)CNTDIR 0 (EDGE)EDGE 0 (FILT)FILT 0 (RSTEN)RSTEN

MODE=DISABLE

Description

Control Register

Fields

MODE

Mode Select

0 (DISABLE): The module is disabled.

1 (OVSSINGLE): Single input LFACLK oversampling mode (available in EM0-EM2).

2 (EXTCLKSINGLE): Externally clocked single input counter mode (available in EM0-EM3).

3 (EXTCLKQUAD): Externally clocked quadrature decoder mode (available in EM0-EM3).
CNTDIR

Non-Quadrature Mode Counter Direction Control
EDGE

Edge Select
FILT

Enable Digital Pulse Width Filter
RSTEN

Enable PCNT Clock Domain Reset

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data